MOUNTAIN VIEW, Calif., May 26, 2021 / PRNewswire / –
Highlights of this announcement:
- Synopsys Design Solutions Certified for Latest Version of TSMC’s 3nm Process Technology DRM and SPICE Models
- Synopsys and TSMC have collaborated on enabling Advanced Design using the Fusion Design Platform and Synopsys Custom Design Platform so that joint customers can take full advantage of the PPA benefits of the technologies. advanced TSMC processes
- Benefits of the benchmark methodology already validated in common customer designs, increasing the number of successful tapes
Synopsys, Inc. (Nasdaq: SNPS) today announced that TSMC has certified Synopsys’ digital and custom design solutions based on TSMC’s latest Design Rules Manual (DRM) and Process Design Kits for its advanced 3 nanometer (nm) process technology. This certification is the result of an extended and multi-year collaboration to provide co-optimized tools, flows and methodologies that allow customers to reach the maximum right of the process in terms of power, performance and area (PPA), accelerating thus the next generation of innovations in high performance. computer chip designs (HPC), mobile, 5G and AI. To learn more about Synopsys certified solutions, the many test chips already performed on these nodes, how to deploy Synopsys design platforms and more, visit the Synopsys booth during the TSMC 2021 Online Technical Symposium at June 1-2.
“TSMC’s cutting edge technology required new levels of EDA collaboration and innovation to achieve the high performance and low power goals of 3nm process technology,” said Suk lee, vice president of the Design Infrastructure Management division at TSMC. “Our long-term collaboration with Synopsys has helped accelerate access and maximize the benefits of TSMC’s latest process offering. We will continue to work closely together to enable next generation designs for HPC, mobile, 5G and AI applications. “
Synopsys’ highly integrated fusion design platform is a critical part of this successful collaboration with advanced nodes, providing full and complete design convergence and close signature correlation for TSMC’s 3nm technology. Synopsys’ Merge compiler™ and the IC compiler™ ll place-and-route product, optimize the quality of results (QoR) thanks to new comprehensive and detailed technological innovations. Advances in full flow and total power optimization and simultaneous legalization and optimization technology achieve the required total power profiles and overall optimized design metrics from PPA.
Other implementation technologies being deployed as part of the 3nm collaboration include support for advanced routing with colouration consideration and via abutments and innovative toggle optimization that helps both core-driven designs. performance and low consumption. In addition, the design compiler® The NXT synthesis product, a key component of the Fusion design platform, has been enhanced to provide a more converged design flow through closer synchronization correlation with IC Compiler II, benefiting all designs targeting the process N3.
Synopsys 3nm collaboration with TSMC also includes PrimeTime® supports low voltage variation and supports TSMC placement rules to enable converged ECO shutdown during implementation and approval. Synopsys PrimePower supports 3nm physical rules for power approval including leakage and dynamic power with StarRC™ mining modeling improvements to provide the necessary precision.
Additional Approval Solutions Certified for TSMC 3nm Technology Include NanoTime Custom Sync Signature, ESP Custom Equivalency Verification, and QuickCap® NX stray field solver solution. Synopsys IC Validator ™ physical approval has been improved to support all advanced process requirements, including new dummy fill features for improved density, layout-dependent effects for layout-to-pattern verification, and efficiency improved debugging delta voltage rules for the DRC.
The custom compiler™ The design and layout solution, which is part of the Synopsys custom design platform, delivers enhanced productivity to designers using TSMC’s advanced process technologies. Many improvements to the custom compiler, validated by early 3nm users, including the Synopsys DesignWare IP team, reduce efforts to meet the requirements of 3nm technology. The PrimeSim Synopsys™ HSPICE®, PrimeSim™ SPICE, PrimeSim™ Pro and PrimeSim™ XA simulators, as part of PrimeSim™ Continuum Solution, improves the processing time of TSMC 3nm designs and provides approval coverage for circuit simulation and reliability requirements.
“The ecosystem and our customers benefit from TSMC and Synopsys’ close collaborations to push achievable boundaries and accelerate access to each new technological process,” said Shankar Krishnamoorthy, Managing Director and Staff of the Digital Design Group at Synopsys. “Our latest digital and personalized R&D collaborations for 3nm technology have enabled new levels of technological innovation to be reached to overcome process challenges and thus open a new chapter of opportunities for our mutual clients to deliver their roadmaps. of advanced products in a timely manner. way.”
Synopsys technology files are available from TSMC for the 3nm process technology. For a complete list of TSMC-certified Synopsys digital and custom platform solutions, please visit: www.synopsys.com/tsmc.
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner of innovative companies developing electronic products and software applications on which we rely every day. As a S&P 500 company, Synopsys has long been a global leader in electronic design automation (EDA) and semiconductor intellectual property and offers the broadest portfolio of testing tools and services. application security. Whether you are a system-on-a-chip (SoC) designer creating advanced semiconductors or a software developer writing more secure, high-quality code, Synopsys has the solutions to deliver innovative products. Learn more about www.synopsys.com.
SOURCE Synopsys, Inc.